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@@ -1,11 +1,15 @@
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#include "main.h"
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/* private defines */
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-#define SPI_BUFFER_SIZE (uint16_t)(24*8)
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+#define SPI_BUFFER_SIZE (uint16_t)(24)
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/* private macros */
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#define HT1632C_CS_ON GPIOA->BRR = (1<<15)
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#define HT1632C_CS_OFF GPIOA->BSRR = (1<<15)
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+#define HT1632C_WR_LOW GPIOB->BRR = (1<<3)
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+#define HT1632C_WR_HGH GPIOB->BSRR = (1<<3)
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+#define HT1632C_DATA_0 GPIOB->BRR = (1<<5)
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+#define HT1632C_DATA_1 GPIOB->BSRR = (1<<5)
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/* private variables */
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static uint8_t display_Buffer[SPI_BUFFER_SIZE] = {0};
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@@ -43,6 +47,9 @@ void Board_Init(void)
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NVIC_EnableIRQ(RCC_IRQn);
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/* Initialize all configured peripherals */
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+ HT1632C_CS_OFF;
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+ HT1632C_WR_HGH;
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+ HT1632C_DATA_1;
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GPIO_Init();
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/* DMA interrupt init */
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@@ -54,17 +61,11 @@ void Board_Init(void)
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SPI1_Init();
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/** Star SPI transfer to shift registers */
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- /* Set DMA source and destination addresses. */
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- /* Source: Address of the SPI buffer. */
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- DMA1_Channel3->CMAR = (uint32_t)&display_Buffer;
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- /* Destination: SPI1 data register. */
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+ /* DMA Destination addr: SPI1 data register. */
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DMA1_Channel3->CPAR = (uint32_t)&(SPI1->DR);
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- /* Set DMA data transfer length (SPI buffer length). */
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- DMA1_Channel3->CNDTR = SPI_BUFFER_SIZE;
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/* Enable SPI transfer */
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- //SPI1->CR1 |= SPI_CR1_SPE;
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+ SPI1->CR1 |= SPI_CR1_SPE;
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// Flag.SPI_TX_End = 1;
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- //GPIOA->BRR = (1<<15); // set ~CS low
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// TIM1_Init();
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// TIM3_Init();
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@@ -77,77 +78,37 @@ void Board_Init(void)
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/* output 'L', 'G', '5' */
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void display_test(void) {
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// prepare buffer
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- display_Buffer[1] = 0xfe;
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- display_Buffer[2] = 0x02;
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- display_Buffer[3] = 0x02;
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- display_Buffer[4] = 0x02;
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- display_Buffer[5] = 0x02;
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-
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- display_Buffer[9] = 0x7c;
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- display_Buffer[10] = 0x82;
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- display_Buffer[11] = 0x92;
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- display_Buffer[12] = 0x92;
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- display_Buffer[13] = 0x5e;
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-
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- display_Buffer[16] = 0xf4;
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- display_Buffer[17] = 0x92;
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- display_Buffer[18] = 0x92;
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- display_Buffer[19] = 0x92;
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- display_Buffer[20] = 0x8c;
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-
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- // init ht1632
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- // disable spi
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- SPI1->CR1 &= ~(SPI_CR1_SPE);
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- // disable dma tranfer & clear data width bits
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- SPI1->CR2 &= ~(SPI_CR2_TXDMAEN | SPI_CR2_DS);
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- // set data width to 12 bit for command mode
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- SPI1->CR2 |= (SPI_CR2_DS_3 | SPI_CR2_DS_1 | SPI_CR2_DS_0);
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- // enable spi
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- SPI1->CR1 |= SPI_CR1_SPE;
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- // select chip
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- HT1632C_CS_ON;
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- // wite for spi
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- while ((SPI1->SR & SPI_SR_BSY) != 0);
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- // transfer command
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- SPI1->DR = 0x802; // 100 0000 0001 0 -- SYS_EN
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- // wite for spi
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- while ((SPI1->SR & SPI_SR_TXE) == 0);
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- SPI1->DR = 0x806; // 100 0000 0011 0 -- LED_ON
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- // wite for spi
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- while ((SPI1->SR & SPI_SR_BSY) != 0);
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- // deselect chip
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- HT1632C_CS_OFF;
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- // disable spi
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- SPI1->CR1 &= ~(SPI_CR1_SPE);
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+ display_Buffer[0] = 0x7f;
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+ display_Buffer[1] = 0x46;
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+ display_Buffer[2] = 0x16;
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+ display_Buffer[3] = 0x1e;
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+ display_Buffer[4] = 0x16;
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+ display_Buffer[5] = 0x06;
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+ display_Buffer[6] = 0x0f;
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+ display_Buffer[7] = 0x00;
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- // set 10 bit data width for write cmd
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- SPI1->CR2 &= ~(SPI_CR2_DS);
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- SPI1->CR2 |= (SPI_CR2_DS_3 | SPI_CR2_DS_0);
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- // enable spi
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- SPI1->CR1 |= SPI_CR1_SPE;
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- // select chip
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- HT1632C_CS_ON;
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- // wite for spi
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- while ((SPI1->SR & SPI_SR_BSY) != 0);
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- // transfer command
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- SPI1->DR = 0x280; // 101 0000000 -- write from addr 0x0
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- // wite for spi
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- while ((SPI1->SR & SPI_SR_BSY) != 0);
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- // deselect chip
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- HT1632C_CS_OFF;
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- // disable spi
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- SPI1->CR1 &= ~(SPI_CR1_SPE);
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+ display_Buffer[8] = 0x3c;
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+ display_Buffer[9] = 0x66;
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+ display_Buffer[10] = 0x03;
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+ display_Buffer[11] = 0x03;
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+ display_Buffer[12] = 0x33;
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+ display_Buffer[13] = 0x66;
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+ display_Buffer[14] = 0x7c;
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+ display_Buffer[15] = 0x00;
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- // set 8 bit data width for data
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- SPI1->CR2 &= ~(SPI_CR2_DS);
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- SPI1->CR2 |= (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0);
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- // enable spi
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- SPI1->CR1 |= SPI_CR1_SPE;
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- // select chip
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- HT1632C_CS_ON;
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- // start transfer
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- SPI1->CR2 |= (SPI_CR2_TXDMAEN);
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- DMA1_Channel3->CCR |= DMA_CCR_EN;
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+ display_Buffer[16] = 0x3f;
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+ display_Buffer[17] = 0x03;
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+ display_Buffer[18] = 0x1f;
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+ display_Buffer[19] = 0x30;
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+ display_Buffer[20] = 0x30;
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+ display_Buffer[21] = 0x33;
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+ display_Buffer[22] = 0x1e;
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+ display_Buffer[23] = 0x00;
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+
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+ HT1632C_Write_Cmd(0x802, 0x800);
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+ HT1632C_Write_Cmd(0x806, 0x800);
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+
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+ HT1632C_Write_Data(display_Buffer, 0x0, SPI_BUFFER_SIZE);
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}
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/**
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@@ -171,7 +132,7 @@ static void GPIO_Init(void)
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PA8 - Buzzer (AF2 for TIM1_CH1)
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PA15 - ~CS / SPI_NSS (AF0)
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PB4 - ~RD / SPI_MISO (AF0) - NOT USED
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- * Select output mode (10) AF+OD+PU, High Speed
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+ * Select output mode (10) AF+OD, High Speed
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PB3 - ~WR / SPI_SCK (AF0)
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PB5 - Data / SPI_MOSI (AF0)
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PB6 - SCL (AF1)
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@@ -180,20 +141,17 @@ static void GPIO_Init(void)
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// MODE Output
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GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER8 | GPIO_MODER_MODER15)) \
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| (GPIO_MODER_MODER8_0 | GPIO_MODER_MODER15_0);
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- GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER3|GPIO_MODER_MODER5|GPIO_MODER_MODER6|GPIO_MODER_MODER7)) \
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- | (GPIO_MODER_MODER3_1|GPIO_MODER_MODER5_1|GPIO_MODER_MODER6_1|GPIO_MODER_MODER7_1);
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+ GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER3|GPIO_MODER_MODER5)) \
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+ | (GPIO_MODER_MODER3_0|GPIO_MODER_MODER5_0);
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// Pull-Up
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GPIOA->PUPDR = (GPIOA->PUPDR & ~(GPIO_PUPDR_PUPDR8 | GPIO_PUPDR_PUPDR15)) \
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| (GPIO_PUPDR_PUPDR8_0 | GPIO_PUPDR_PUPDR15_0);
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- /*GPIOB->PUPDR = (GPIOB->PUPDR & ~(GPIO_PUPDR_PUPDR3|GPIO_PUPDR_PUPDR5|GPIO_PUPDR_PUPDR6|GPIO_PUPDR_PUPDR7)) \
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- | (GPIO_PUPDR_PUPDR3_0|GPIO_PUPDR_PUPDR5_0|GPIO_PUPDR_PUPDR6_0|GPIO_PUPDR_PUPDR7_0);*/
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// High Speed
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GPIOA->OSPEEDR = (GPIO_OSPEEDR_OSPEEDR8|GPIO_OSPEEDR_OSPEEDR15);
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GPIOB->OSPEEDR = (GPIO_OSPEEDR_OSPEEDR3|GPIO_OSPEEDR_OSPEEDR5 \
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|GPIO_OSPEEDR_OSPEEDR6|GPIO_OSPEEDR_OSPEEDR7);
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// Open Drain
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- GPIOB->OTYPER = (GPIO_OTYPER_OT_3|GPIO_OTYPER_OT_5 \
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- |GPIO_OTYPER_OT_6|GPIO_OTYPER_OT_7);
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+ GPIOB->OTYPER = (GPIO_OTYPER_OT_6|GPIO_OTYPER_OT_7);
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// AF1 for PB6 & PB7
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GPIOB->AFR[0] = (0x1<<24) | (0x1<<28);
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@@ -241,17 +199,81 @@ static void SPI1_Init(void)
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{
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/* SPI1 DMA Init */
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/* SPI1_TX Init: Priority high, Memory increment, read from memory, non-circular mode,
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- ?Enable DMA transfer complete/error interrupts */
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- DMA1_Channel3->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_DIR); // DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE
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+ Enable DMA transfer complete/error interrupts */
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+ DMA1_Channel3->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_CIRC | DMA_CCR_TCIE); // | DMA_CCR_TEIE
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/* SPI1 interrupt Init */
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NVIC_SetPriority(SPI1_IRQn, 0);
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NVIC_EnableIRQ(SPI1_IRQn);
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- /* SPI1 parameter configuration: master mode, data 8 bit, divider = 64, TX DMA */
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- // SPI_CR1_CPOL ?
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- SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_2 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI); // SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE |
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- SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN); // | SPI_CR2_FRXTH);
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+ /* SPI1 parameter configuration: master mode, data 8 bit, divider = 2, TX DMA */
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+ SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_CPOL | SPI_CR1_CPHA | SPI_CR1_LSBFIRST);
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+ SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN);
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+}
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+
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+/**
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+ * @brief Write <nbits> bit of data to selected HT1632Cs
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+ * @param data words to write, nbits of bits (1<<(num-1))
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+ */
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+void HT1632C_Write_bits(const uint16_t data, uint16_t nbits) {
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+ do {
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+ HT1632C_WR_LOW;
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+
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+ if (data & nbits) {
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+ HT1632C_DATA_1;
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+ } else {
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+ HT1632C_DATA_0;
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+ }
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+// _delay_half_us();
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+ HT1632C_WR_HGH;
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+// _delay_half_us();
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+ } while (nbits >>= 1);
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+}
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+
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+/**
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+ * @brief Write CMD to selected HT1632Cs
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+ * @param data words to write
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+ * @param nbits cmd len in bits (1<<(num-1))
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+ */
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+void HT1632C_Write_Cmd(const uint16_t data, uint16_t nbits) {
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+ // GPIO pin mode
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+ GPIOB->MODER &= ~(GPIO_MODER_MODER3 | GPIO_MODER_MODER5);
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+ GPIOB->MODER |= (GPIO_MODER_MODER3_0 | GPIO_MODER_MODER5_0);
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+
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+ HT1632C_CS_ON;
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+ HT1632C_Write_bits(data, nbits);
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+ HT1632C_CS_OFF;
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+}
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+
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+/**
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+ * @brief Write Data to selected HT1632Cs
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+ * @param data pointer to data array
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+ * @param addr begin address
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+ * @param len bytes to write
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+ */
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+void HT1632C_Write_Data(const uint8_t * data, const uint8_t addr, const uint8_t len) {
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+ uint16_t a = 0x280 | (addr & 0x7f);
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+
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+ /* DMA Source addr: Address of the SPI buffer. */
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+ DMA1_Channel3->CMAR = (uint32_t)&data[0];
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+ /* Set DMA data transfer length (SPI buffer length). */
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+ DMA1_Channel3->CNDTR = len;
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+
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+ // GPIO pin mode
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+ GPIOB->MODER &= ~(GPIO_MODER_MODER3 | GPIO_MODER_MODER5);
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+ GPIOB->MODER |= (GPIO_MODER_MODER3_0 | GPIO_MODER_MODER5_0);
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+
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+ HT1632C_CS_ON;
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+ HT1632C_Write_bits(a, 0x200);
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+
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+ // SPI pin mode
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+ GPIOB->MODER &= ~(GPIO_MODER_MODER3 | GPIO_MODER_MODER5);
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+ GPIOB->MODER |= (GPIO_MODER_MODER3_1 | GPIO_MODER_MODER5_1);
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+
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+ // start transfer
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+ SPI1->CR2 |= (SPI_CR2_TXDMAEN);
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+ DMA1_Channel3->CCR |= DMA_CCR_EN;
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+ // End of transaction in DMA1_Channel2_3_IRQHandler
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}
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/**
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@@ -266,3 +288,19 @@ void EXTI4_15_IRQHandler(void)
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//ES_PlaceEvent(evNewSecond);
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}
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}
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+
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+/**
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+ * @brief This function handles DMA1 channel 2 and 3 interrupts.
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+ */
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+void DMA1_Channel2_3_IRQHandler(void) {
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+ if ((DMA1->ISR & DMA_ISR_TCIF3) != 0) {
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+ // clear interrupt flag
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+ DMA1->IFCR = DMA_IFCR_CTCIF3;
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+ // disable transfer
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+ DMA1_Channel3->CCR &= ~(DMA_CCR_EN);
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+ // wite for spi
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+ while ((SPI1->SR & SPI_SR_BSY) != 0) { __NOP(); };
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+ // deselect chip
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+ HT1632C_CS_OFF;
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+ }
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+}
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Vladimir N. Shilov